List of registers of CAN-LIN SBC Click driver.
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List of registers of CAN-LIN SBC Click driver.
◆ CANLINSBC_REG_BFECR
| #define CANLINSBC_REG_BFECR 0x32 |
◆ CANLINSBC_REG_BFESR
| #define CANLINSBC_REG_BFESR 0x65 |
◆ CANLINSBC_REG_BFIR
| #define CANLINSBC_REG_BFIR 0x33 |
◆ CANLINSBC_REG_CDMR0
| #define CANLINSBC_REG_CDMR0 0x68 |
◆ CANLINSBC_REG_CDMR1
| #define CANLINSBC_REG_CDMR1 0x69 |
◆ CANLINSBC_REG_CDMR2
| #define CANLINSBC_REG_CDMR2 0x6A |
◆ CANLINSBC_REG_CDMR3
| #define CANLINSBC_REG_CDMR3 0x6B |
◆ CANLINSBC_REG_CDMR4
| #define CANLINSBC_REG_CDMR4 0x6C |
◆ CANLINSBC_REG_CDMR5
| #define CANLINSBC_REG_CDMR5 0x6D |
◆ CANLINSBC_REG_CDMR6
| #define CANLINSBC_REG_CDMR6 0x6E |
◆ CANLINSBC_REG_CDMR7
| #define CANLINSBC_REG_CDMR7 0x6F |
◆ CANLINSBC_REG_CFCR
| #define CANLINSBC_REG_CFCR 0x2F |
◆ CANLINSBC_REG_CIDMR0
| #define CANLINSBC_REG_CIDMR0 0x2B |
◆ CANLINSBC_REG_CIDMR1
| #define CANLINSBC_REG_CIDMR1 0x2C |
◆ CANLINSBC_REG_CIDMR2
| #define CANLINSBC_REG_CIDMR2 0x2D |
◆ CANLINSBC_REG_CIDMR3
| #define CANLINSBC_REG_CIDMR3 0x2E |
◆ CANLINSBC_REG_CIDR0
| #define CANLINSBC_REG_CIDR0 0x27 |
◆ CANLINSBC_REG_CIDR1
| #define CANLINSBC_REG_CIDR1 0x28 |
◆ CANLINSBC_REG_CIDR2
| #define CANLINSBC_REG_CIDR2 0x29 |
◆ CANLINSBC_REG_CIDR3
| #define CANLINSBC_REG_CIDR3 0x2A |
◆ CANLINSBC_REG_CTRXESR
| #define CANLINSBC_REG_CTRXESR 0x63 |
◆ CANLINSBC_REG_DIDR
| #define CANLINSBC_REG_DIDR 0x7E |
◆ CANLINSBC_REG_DMCR
| #define CANLINSBC_REG_DMCR 0x01 |
CAN-LIN SBC register list.
Specified register list of CAN-LIN SBC Click driver.
◆ CANLINSBC_REG_DMSR
| #define CANLINSBC_REG_DMSR 0x03 |
◆ CANLINSBC_REG_DRCR
| #define CANLINSBC_REG_DRCR 0x26 |
◆ CANLINSBC_REG_EFCR
| #define CANLINSBC_REG_EFCR 0x3A |
◆ CANLINSBC_REG_FECR
| #define CANLINSBC_REG_FECR 0x3B |
◆ CANLINSBC_REG_GESR
| #define CANLINSBC_REG_GESR 0x60 |
◆ CANLINSBC_REG_GLFT
| #define CANLINSBC_REG_GLFT 0x67 |
◆ CANLINSBC_REG_GPM0
| #define CANLINSBC_REG_GPM0 0x06 |
◆ CANLINSBC_REG_GPM1
| #define CANLINSBC_REG_GPM1 0x07 |
◆ CANLINSBC_REG_GPM2
| #define CANLINSBC_REG_GPM2 0x08 |
◆ CANLINSBC_REG_GPM3
| #define CANLINSBC_REG_GPM3 0x09 |
◆ CANLINSBC_REG_LDOCR
| #define CANLINSBC_REG_LDOCR 0x02 |
◆ CANLINSBC_REG_LDOECR
| #define CANLINSBC_REG_LDOECR 0x05 |
◆ CANLINSBC_REG_LDOESR
| #define CANLINSBC_REG_LDOESR 0x66 |
◆ CANLINSBC_REG_LTRXCR
| #define CANLINSBC_REG_LTRXCR 0x21 |
◆ CANLINSBC_REG_LTRXESR
| #define CANLINSBC_REG_LTRXESR 0x62 |
◆ CANLINSBC_REG_LTRXSR
| #define CANLINSBC_REG_LTRXSR 0x24 |
◆ CANLINSBC_REG_PWKS
| #define CANLINSBC_REG_PWKS 0x4B |
◆ CANLINSBC_REG_REGCR
| #define CANLINSBC_REG_REGCR 0x25 |
◆ CANLINSBC_REG_RWPR
| #define CANLINSBC_REG_RWPR 0x0A |
◆ CANLINSBC_REG_SECR
| #define CANLINSBC_REG_SECR 0x04 |
◆ CANLINSBC_REG_SESR
| #define CANLINSBC_REG_SESR 0x61 |
◆ CANLINSBC_REG_TRXCR
| #define CANLINSBC_REG_TRXCR 0x20 |
◆ CANLINSBC_REG_TRXECR
| #define CANLINSBC_REG_TRXECR 0x23 |
◆ CANLINSBC_REG_TRXECR2
| #define CANLINSBC_REG_TRXECR2 0x34 |
◆ CANLINSBC_REG_TRXESR2
| #define CANLINSBC_REG_TRXESR2 0x35 |
◆ CANLINSBC_REG_TRXSR
| #define CANLINSBC_REG_TRXSR 0x22 |
◆ CANLINSBC_REG_WDCR1
| #define CANLINSBC_REG_WDCR1 0x36 |
◆ CANLINSBC_REG_WDCR2
| #define CANLINSBC_REG_WDCR2 0x37 |
◆ CANLINSBC_REG_WDSR
| #define CANLINSBC_REG_WDSR 0x38 |
◆ CANLINSBC_REG_WDTRIG
| #define CANLINSBC_REG_WDTRIG 0x39 |
◆ CANLINSBC_REG_WKECR
| #define CANLINSBC_REG_WKECR 0x4C |
◆ CANLINSBC_REG_WKESR
| #define CANLINSBC_REG_WKESR 0x64 |